Abstract
This chapter gives some attention to emerging issues and provides some insight into future challenges for FPGAs. Attention is given to the changes in design methods as FPGA architectures have emerged. A topic closely associated with the further adoption of FPGAs in computing applications is the design flow. Whilst progress has been made in increasing the level of abstraction, thus removing the need to get software designers to learn specialized HDLs for programming FPGAs and allowing them to employ C descriptions in Vivado and even OpenCL, the compile times will still seem strangely long to programmers. The chapter covers the key issues of floating-point arithmetic and memory architectures. One factor that has received some attention throughout the book is the availability of a wide range of different sizes of parallel memory, whether in the form of distributed RAM blocks, simple LUTs or a single register.
