FPGA‐based Implementation of Signal Processing Systems, Second Edition

The choice of arithmetic has always been a key aspect for digital signal processing (DSP) implementation. With FPGA platforms, the choice of arithmetic can have a much wider impact on the performance as the system designer can get a much more direct return from any gains in terms of reducing complexity. This chapter covers some basics of computer arithmetic, including the various forms of number representations as well as an introduction to fixed- and floating-point arithmetic. This is followed by a brief introduction to adder and multiplier structures. Of course, alternative representations also need some consideration so signed digit number representation (SDNR), logarithmic number representations (LNS), residue number representations (RNS), and coordinate rotation digital computer (CORDIC) are considered in the chapter. The chapter also discusses dividers and circuits for square root and the choice between fixed-point and floating-point arithmetic for FPGA.